The present invention generally relates to integrated circuits and methods for fabricating integrated circuits, and more particularly, the invention relates to integrated circuits and methods for fabricating integrated circuits having magnetic tunnel junctions (MTJs).
The dimensions of semiconductor devices and memory devices have been steadily shrinking as scaling to smaller dimensions leads to continuing device performance improvements. Memory devices, such as magnetoresistive random access memory devices, i.e., MRAM, have typically been formed using etch patterning methods, such as reactive ion etching. At the currently desired length scales, the lateral diffusion of oxidizing species present in prior etch patterning methods, such as reactive ion etching, can limit their suitability for forming memory devices.